10Cl006ye144I7G praebet summus densitas programmable portas, onboard opibus et universae i / o. Hae opibus potest obviam in requisitis I / o expansion et chip ad chip interface.
10Cl006ye144I7G praebet summus densitas programmable portas, onboard opibus et universae i / o. Hae opibus potest obviam in requisitis I / o expansion et chip ad chip interface.
10Cl006ye144I7G est optimized pro humilis sumptus et humilis static virtute consummatio, faciens idealis electionis pro magna-scale et sumptus sensitivo applications.
Product Features
Minimum sumptus, humilis-potentia FPGA structure
1.0 V et 1.2 V Kernel Voltage Options
Logica elementum (Le) - quattuor initus Lookup tables (Lutet) et Regestis
Unus 18x18 vel duo 9X9 multiplicatorem modi, qui potest esse cascaded
Completum DSP IP ad algorithm acceleratio
XV ad Dedicated horologium paxillos, capax ad XX global horologium
Ad quattuor universae PLLs
Providere potens horologium procuratio et synthesi capabilities
Sustinet multiple I / O signa
Programmable I / O Function
Verus LVDs et Analog LVDs transmitters et receptores
De Chip Terminal (Oct)
applicatio
Industrial et Automotive
Broadcasting, wired et wireless
Calculation et repono
Medical, dolor et intelligentes navitas
